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Physical cells used in IC design

 Why endcap cells are used in design ?

There are high chances to get damaged the gate of standard cells placed at the boundary during the manufacturing of chip.

  • Nwell terminates within endcap cells , so we cannot replace filler with endcap as filler is for nwell continuity , also dummy poly layers present in endcap cells protect from wave proximity effect.
  • Tap cells differ in such a way that nwell continuous and not continuous in endcap cells .
  • To avoid the base layer DRC (Nwell and Implant layer) at the boundary.
  • To make the proper alignment with the other block.
  • The end cap cell or boundary cell is placed at both the ends of each placement row to terminate the row. 
  • It has also been placed at the top and bottom row at the block level to make integration with other blocks

End caps are added before std cells placement and are preplaced fixed cells which added immediately after site row creation.


Boundary cells have mainly Nwell layer, implant layers, and dummy poly layer and metal rails (metal rails not extended outside )as shown in the figure





What are filler cells ?


Used for n well continuity and implant layers of std cells.
If nwell land implantation layers are continuous it’s easy for foundries to generate masks

If nwell is discontinuous DRC rules will force us to separate cells further apart to maintain minimum distance because of well proximity effect.( txtr whose nwell is exposed will have detouriation in performance)


In Tapless lib design there will be well discontinuity if fillers are not used .(nwell to vdd and psub to vss to prevent latchup, in tapless library tap cells are added in  regular interval if there is discontinuity tap cells must added next to nwell break )

Fillers are not having substrate connection like tap cells (nwell tie to vdd and psub connection to vss)















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